Computer Architecture and the CPU notes
54 notes by 45 users · Page 2 of 2
This GoConqr page gathers over 40 community-made notes on computer architecture and the CPU, from processor components to memory and instruction cycles. School and university students can use them to study these topics, while teachers can find material for lessons. Pick a note to begin.
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- Von Neumann and Harvard architectures170
- CPU components222
- CPU registers55
- Fetch-decode-execute cycle106
- Computer buses67
- Memory and cache69
- Input/output and interrupts24
- Instruction sets and addressing modes9
- Assembly language and machine code17
- Little Man Computer20
- Processor types and RISC vs CISC56
- Pipelining and parallel processing12
- CPU performance23
Notes
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internal architecture ALU- Which performs all the arithmetic and logic operations GENERAL PURPOSE REGISTER- Every processor offers a set of general registers for various storage and operations. STATUS REGISTER- The status register accommod...
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Eight Great Ideas - created from Mind Map Moore's LawMoore's Law AbstractionRemove details at each level for simplicity Optimize Common case
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addressing modes the way using which the data sources or destinations addresses are specified in the instruction mnemonics for moving data, is called addressing mode. immediate, register, direct, indirect, implied, indexed. immediate ...
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Catching and prefetching - creado desde un Mapa Mental Computer Architecture Buffer Request optimization
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Catching and prefetching - creado desde un Mapa Mental Computer Architecture Buffer Request optimization
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Fetch Execute Cycle Fetch Execute Cycle:The Fetch Execute Cycle is the cycle that in which data/instruction is sent from main memory to the processor where it is then decoded and ran. The steps required for the fetch execute cycle. The b...
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Little man computing Little Man Computing- an imaginary computer designed to enable you to easily enter and test assembly language programs. Concept about how assembly language works. - a man in a room. does 3 things- fetches, decodes and...
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Chapter 5:Bus Systems - created from Mind Map Data bus-Carries data and instructions Address bus-Carries addresses from register to memory Control bus-Carries control signals and timing signals
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Bus Characteristics - created from Mind Map Bus Width Bus Speed Bus Bandwidth
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Chapter 6 : Input/Output - created from Mind Map External Devices Programmed I/O I/O Commands
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CPU (Central Processing Unit) - created from Mind Map Input Unit Output unit ALU (Arithmetic and Logic Unit
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Computer Science - created from Mind Map Computer Systems Systems Architecture CPU
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CompSci - created from Mind Map Computer systems System architecture CPU
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CPU (central processing unit) - created from Mind Map fetch decode execute the registers parts of a CPUCCCC