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Mapa mental

Hardware

Mohamed Moalin Inglés

Contenido del mapa

Hardware

  1. Buses

    • Transmit Data between components
    • System buses connect cpu and ram
    • I/O buses connect to hard disk, monitor, keywords
    • System Bus
    • I/O Buses
    • Data Bus
      • Data bus  - 8 to 64 - bus width  - One wire/ One bit of data per operation
    • Address Bus
      • Wires indicate address of item wanted from CPU
    • Control Bus
      • Controls information about how data is to be transferred.
  2. Types of Memory

    • Checking Performance? MIPS is used to measure the CPU PERFORMANCE, it stands for million instructions per second. It is inefficient because no two chips use exactly the same kind of instructions, execution method etc. 
    • FLOPS stands for floating point operations per second. Equation is FLOPS = cores * clock * FLOPS/cycle. FLOPS measures the computing ability of a computer. An example of a floating point operation is the calculation of mathematical equations.
    • Auxiliary Memory
      • Access times many times slower than above routes
      • Virtual Memory
        • - Implemented via auxiliary device - Virtual Address space - This requires both hardware and software intervention
        • Main Memory
          • Combines with the CPU directly but can also communicate with auxiliary devices. 
          • Cache Memory
            •  - Located close to Chip  - Highly contemporary data, stuff likely to be needed again  - CPU looks at Cache first  - Level one and level two cache  - Cache hits/Cache misses, hit ratio
            • CPU register
              • Smallest, fast on the chip
            • Static (SRAM) - cache memory
              • Flip-Flops
          • RAM
            • Dynamic (DRAM) - Main memory
              • Stored as electrical charge that needs updating every milliseconds
          • ROM
            • Boot loaders - BIOS User programmed PROMS
      • SCSI
        • Standard for peripherals for many years PC's, Mac's and unix boxs
      • IDE
        • Cheapest technology - Built in most boards - EIDE you can mix devices (like SCSI) but only up to 4 devices. - Two cables on each master and slave devices
      • EIDE
        • Interface so mass storage items
      • SATA
        • Important thing about the above is the controller were located within the driver themselves
      • Disks (magnetic (hard disks))
  3. Networking

    • Bandwidth
      • The range of frequencies within a band, in particular that used for transmitting a signal
      • It is a measure of bit-rate of available or consumed data communication resources expressed in bits per seconds or multiples of it. measured in hertz
    • S/N Ratio
      • Signal to noise ratio
    • Connections
      • UTP
        • Unshielded twisted pair: two conductors of a single circuit are twisted together for purposes of cancelling out electromagnetic interface from external sources
      • Co-axial
        • 1) One conductor completely surrounds the other.2) Shield the other conductors, 3) two or more layers of shield
      • Optic fibre
        • Can be expensive, brittle, waterproof, no interference from other electrical sources. between 700mbs to 1gbps over km.
    • Networks
      • LANS
        • Local area network -   - Thick ethernet, co-axial cable  - repeaters  - usually 10mbps  - baseband means not modulated  - 10base5 means 10mbps baseband 5*100 segmented length  - each item needs a network interface card
      • MANS
        • Metropolitan area network
      • WANS
        • Wide area network
    • Token Rings
      •  - information is passed around a ring  - everyone receives every message but only take note of their own.  - If not they act as a repeater and pass the message on  - Up to 250 nodes on a ring  - speeds ~16Mbps for shielded cables ~4 UTP
    • Token Bus
      •  - Similar to above but logical  - Not dependant on what is physically next door  - Complex software determines what is next in the logical sequence  - Breaking this sequence means that we must pass on a 'machine is leaving the ring' message and readjust the logic.
    • OSI Networking reference model
      • 'Open System Interconnection' model is a conceptual model that characterizes and standardizes the internal functions of a communication system by partitioning it into seven layers each serving the inferior.
      • 7 Application Layer
        • The closest layer to the user, it interacts with the software application that implement a communication component.
        • 6 Presentation Layer
          • This layer established context between application-layer entities, in which the application-layer entities may use different syntax and semantics if the presentation service provides mapping between them
          • 5 Session Layer
            • Controls the dialogues (connections) between computers. It establishes, manages and terminates connections between local and remote applications
            • 4 Transport Layer
              • Provides the functional and procedural means of transferring variable-length data sequences from a source to a destination via one or more networks.
              • 3 Network Layer
                • Provides the functional and procedural means of transferring variable length data sequences from one node to another connected to the same network
                • 2 Data Link Layer
                  • The data link provides a link between connected nodes
                  • Enter text here
                    • Defines the electrical and physical specification of the data connection. It defines the relationship between devices and a physical transmission medium.
      • TCP/IP Reference Model
        • Transmission control protocols and the internet protocol; or the Computer networking model and communications protocols is used by the internet and similar computer networks.
        • Provides end to end connectivity specifying how data should be formatted, addressed, transmitted, routed and recieve
        • Network interface/Access
          • Specifies details of how data is physically sent through the network including how bits are electrically signalled by hardware devices that interface directly with a network medium such as coaxial cable, optic fibre or twisted pair copper wire.
          • Network Internet/IP
            • Packages data into IP Datagrams, which contain source and destination address information that is used to forward the datagrams between hosts and across network
            • Network transport layer TCP
              • Provides communication session management between host computers.
              • Defines the level of service and status of the connection used when transporting data
              • Application
                • Defines TCP/IP application protocols and how host programs interface with transport layer services to use the network
  4. CPU

    • Programs run with the CPU and memory storing and processing data and instructions. The system bus continually feeding the CPU instructions or data to be handled according to the instructions.
    • I.e. adding, subtracting, storing data, printing.
    • Machine code is how instructions are stored internally. Each microprocessor has their own machine code. 
    • ALU
      • Performs arithmetic and logic operations (inc. bit shifting). Controlled by the Control Unit. May use on board CPU registers or main memory to store operands.
      • Half adder
        • An adder is a digital circuit that performs addition on binary numbers.
        • The half adder adds two single binary digits A & B. It has two outputs: sum (S) and carry (C). The carry signal represents an overflow into the next digit of a multi-digit addition.
      • Logic and Sequencing
        • Logic Gates
          • Decision making is frequent in electronic circuits. Logic gates allow a means to which two or more inputs are looked at, and used to determine the outputs from a circuit. 
          • They are implemented by transistors.
          • Seven gates: AND, OR, NOT, NAND, NOR, XOR, NOR.
      • Full Adder
        • gives a third input which represents the carry from a previous column. It can be built using two half adders and an OR-gate.
      • Two's Complement
        • All negative numbers start with a 1 as their leftmost digit.  All positive numbers start with 0 at their leftmost digit.
        • >one's complement coz 0000 is 0000 in negative.
    • Control Unit
      • Manages execution of program. 
      • Instructions are brought in sequence where it is decoded and necessary instructions are issued.
    • Register
      • Are places to store items. They have a fixed capacity in terms of the number of bits they contain. They can have data bits or control bits. Things are mostly transferred frequently in registers
      • Flip-Flops
        • Basic type of memory, where 'states' are stored. Using gates, the concept 'feedback' is implemented by feeding back into the input the output of a circuit thus storing the data or bit.
        • The Set/Reset latch is a sequential circuit with two stable states, It can be constructed from NOR gates or NAND gates. You click on set and the output will be Q=1, reset sets Q into 0. Pressing both doesn't change anything.
        • D-Type latch
          • It is a simpler latch than then S/R flipflop. The two inputs complement each other. When the input is 0, the input's complement (Q') becomes 1, and the Q prime is set 0. When the input is 1, then the state of the latch is 1 and the Q' is 0
      • Logic Level/Clock
        • When designing sequential circuits, its best if the storage components store new data at a synchronised time. 
        • This is done with a signal called the clock that oscillates between 0 and 1. It is like a gatekeeper, and it only allows the latch to store new data/change value when the logic level is set to 1.  
      • Shift Registers
        • Internal operations may be parallel, some data i.e. data produced as a function of time, can be in serial form. Logic levels/clock is needed.
      • PS Registers
        • Parallel in, serial information out. D-latch can get its input from one of two sources, from a set input or from the flipflop to the left. Parallel input can thus be fed to each flip-flop. It may then be output by passing to right each thime the clock goes to 0. Achieving serial out.

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Descripción
Mapa Mental sobre Hardware, creado por Mohamed Moalin el 11/08/2014.
Creado por
Mohamed Moalin
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