Flashcards
1.1.1 Structure and Function of the Processor
Cards in this deck (28)
- 1Busses/ System bus/ Front Side BusThe communication channels between the central processing unit, the processor and the memory and other components in the computer system
- 2Address BusCarries the address of the instructions or data that’s in the MAR from the processor to the memory
Only goes in one direction, it only the processor that can send an address to the memory - 3Data BusCarries data and instructions between the processor and the memory
Goes in 2 directions, data can both directions from CPU to RAM vice visa - 4Control BusSends signals between the processor and the components
Goes in 2 directions, data can both directions from CPU to RAM vice visa - 5ALU – Arithmetic Logic UnitAdds and subtracts numbers
Can compare binary numbers - 6CU – Control Unit:Send a signal to coordinate how the processer works
Controls how data moves around the CPU
Controls how data moves between the CPU and the memory - 7Central Processing Unit RegistersMemory locations within the processor
Works at a fast speed
Used to control the fetch the decode execute cycle - 8PC - Program CounterStores the address of the next instruction, so that the processor can keep track of where it is in the program
- 9MAR – Memory Address RegisterStores the address of the data OR instruction that are sent to or fetched from the memory
- 10MDR – Memory Data RegisterStores the data that is to be sent to or fetched from the memory
- 11CIR – Current Instruction RegisterStore the actual instruction that is being decoded and executed
- 12ACC –AccumulatorStore the result of calculations made by the ALU
- 13IRInterrupt Register
- 14Fetch cycle (pt.1)1. The PC holds the instruction of the next instruction
2. The address is copied into the MAR
3. The address is then sent along the address bus, where it waits to receive a signal on the control bus
4. The CU sends signal on the control bus to the memory controller to memory read - 15Fetch cycle (pt.2)5. The contents in the address can be transferred along the data bus
6. The value from the RAM now goes to the CIR
7. The instruction has now been fetched so we can now increase the PC to get the next instruction - 16Decode cycle8. The instruction in the CIR is now divided into binary code standing for the operation to be carried out
9. The Control Unit interrupts the operation code so that the processor knows what to do next - 17Execute cycle10. The address is sent to the MAR The address is sent to the MAR
11. The address is sent down the data bus where the MDR has the data the was in RAM to be passed to the ACC.
12. The ACC then receives the value and ready to fetch the next instruction. - 18Factors that affects the performance of a CPU: number of coresA processor will often have multiple processors or cores on a single chip. This means more than one instruction can be executed at a time
Adv: more than one instruction can be executed at a time - 19Factors that affect the performance of a CPU: size of registersThe CPU contains small memory spaces called registers, which store data and instructions while the CPU processes the. The size of the registers determines the amount of data with which the computer can work at a one time.
- 20Factors that affect the performance of a CPU: RAMThe more RAM a PC has, the more program instructions and data can be held in memory, which is faster than storage on disk.
Dis: If PC has little memory to run, it must remove data between RAM and the hard disk frequently. This process can greatly slow a PC's performance - 21Factors that affect the performance of a CPU: Clock speedThe computers system clock set the pace for the CPU by vibrating quartz crystal. A single "tick" of the clock is the time required to turn a transistor off and on.
Adv: The faster a PC's clock runs, the more instructions the PC can execute each second. - 22Factors that affect the performance of a CPU: Data busThe data bus width determines how many bits can be transmitted between the CPU and other devices. The speed of the data transfer along the bus can also affect its performance
Adv: The wider the data bus, the more bits that can be transmitted at once, reducing the number of fetches. - 23Factors that affect the performance of a CPU: CacheCache memory is a high-speed memory that holds most recent data and instructions loaded by the CPU.
Adv: reduces the number of fetches for both instructions and data.
Cache is located directly on the CPU, making it faster to access than normal RAM. - 24Using pipeline in a processor to improve efficiencyThe pipeline is used to fetch the next instruction whilst the first one is being decoded.
This improves efficiency as more than one instruction is in the process of being carried out, but only if the subsequent instructions can be predicted. - 25Flushing the pipeIf the wrong instruction is fetched it will have to be thrown away when the previous one is decoded and get the correct on instead.
If this is done too often the efficiency of pipelining decrease - 26Von Neumann ArchitectureShare's the same memory space for instructions and data - are served by the system bus
Registers are used as fast access to instructions and data because it is quicker to handle data in the CPU than working with it in memory - 27Harvard Architecture- Able to carry out two instructions at once
- Reading and writing data can be done at the same time as fetching an instruction
- Instructions and data stored in separate memory units
- Used by RISC processor - 28Contemporary ArchitectureIncorporates aspects of both von Neumann and Harvard architecture. In one design, there is one main memory for holding both data and instructions, but CPU cache memory is divided into an instruction cache and a data cache. Harvard architecture is used as the CPU accesses the cache.
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- A-Level Computer Science (1.1 The characteristics of contemporary processors, input ..) Flashcards on 1.1.1 Structure and Function of the Processor , created by Alyssa Watson on 28/05/2018.
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