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Architecture Models

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Architecture Models
Von Neumann
- One area of RAM stores both programs and user data
- One processor in the system
UMA
- Each CPU in a cluster can access any of the RAM within the cluster
- As long as it is running at same clock speed
- Individual CPUs can have their own cache memory allocated in the shared RAM
- Memory bus is shared
- The default option in modern PCs
- Each CPU in a cluster can access any of the RAM within the cluster
Harvard
- Contains 2 RAM areas
- One to store data
- Other stores programs
- One processor
- Used within embedded systems
- can fetch data from program memory whilst reading or writing to data memory at the same time
- Avoids the "Von Neumann bottleneck"
- Where the system bus can't fetch instructions quickly enough from main memory
- Avoids the "Von Neumann bottleneck"
- Contains 2 RAM areas
NUMA
- Each CPU can have some local memory allocated as well as sharing other parts of RAM with other PCs in the cluster
- Can be faster as it doesn't have to wait for foreign memory space
- Memory bus is not shared
- Reduces load on shared resources
- Can easily scale up a system using NUMA
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- Year 9 Computing Mind Map on Architecture Models, created by Danny Peak on 09/11/2020.
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- Danny Peak
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