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Structure and Function of the Processor

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Structure and Function of the Processor
Hardware
- ALU - (Arithmetic Logic Unit) - Carries out all the calculations and logical decisions
- CU - (Control Unit) - Signals are sent out to control the flow of data around the CPU and Memory. Instructions are also decoded here
- ACC - (Accumulator) - Stores the produce of the ALU
- PC - (Program Counter) - Loads the RAM location of the instruction that will next be Fetched-Decoded-Executed
- MDR - (Memory Data Register) - Stores the data that has been fetched from/stored in memory
- MAR - (Memory Address Register) - Carries the location of the data/instruction that are to be fetched from/sent to
- CIR - (Current Instruction Register) - Stores the recent fetched instruction waiting to be decoded and executed
- Buses - Communication channels which data is sent around the computer, temporarily stored data to reduce memory storing
- Data Buses carry data to/from the memory or processor
- Address Buses carry the memory location of the instruction
- Control Buses sends control signals from the CU
Fetch-Decode-Execute Cycle
- 0 LDA Num1 1 ADD Num2 2 STA Total 3 HLT 4 5 5 10
- Step 1 Fetch: The PC starts at 0, which loads into the MAR. Then the CU sends a fetch signal and 0 down the address bus, finally after reaching its location the contents of memory location 0 are fetched by the data being sent down the data bus and stored in the CIR, then the PC increases by 1
- Step 2 Decode: Contents of the CIR are sent to the CU which dcodes the instruction as 'Load contents into Acc' then the location is loaded into the MAR
- Step 3 Execute: CU sends a fetch instruction down the control bus and the value in the MAR down the address bus. Contents of memory location 4 are sent to the processor down the data bus and loaded into MDR and then sent to the accumulator
- Step 2 Decode: Contents of the CIR are sent to the CU which dcodes the instruction as 'Load contents into Acc' then the location is loaded into the MAR
- Step 1 Fetch: The PC starts at 0, which loads into the MAR. Then the CU sends a fetch signal and 0 down the address bus, finally after reaching its location the contents of memory location 0 are fetched by the data being sent down the data bus and stored in the CIR, then the PC increases by 1
- 0 LDA Num1 1 ADD Num2 2 STA Total 3 HLT 4 5 5 10
Factors affecting performance of a CPU
- Clock Speed
- The number of calculations a processor can carry out per second, the more it can carry out per second the greater the performance
- Cache
- Built within the processor to reduce distance data has to travel. Stores data and instructions which are frequently used to increase performace however the llarger it is the slower it becomes.
- Cores
- A core is a processor , therefore more cores the more tasks a CPU can complete at once or using cores to complete a complex task
- Pipelining
- Using processors to complete a complex task by, setting certain tasks to each individual processor however if a Branch instruction happens it has to dispose all the current instructions to continue
- Clock Speed
Von Neumann, Harvard and Contemporary Archiecture
- Von Neumann Archiecture
- Harvard Archiecture
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- A level Computing Mind Map on Structure and Function of the Processor, created by Josh Crooks on 16/09/2016.
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- Josh Crooks
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