Notes
Fetch - Decode - Execute Cycle
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Fetch
The contents of PC transferred to MAR
The address bus is used to transfer this address to main memory
The contents of addresses memory location is moved into the MBR
The contents of MBR is transferred to the CIR via the data bus.
Decode
The instructions are held by the CIR
The control unit decodes the instruction
It splits it into the Opcode and the Operand.
Execute
The opcode identifies the operation that needs to be performed
The instruction is executed by the relevant part of the processor
Results of the execution are stores in the accumulator.
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- AS - Level Computing (7. Computer Organisation and Architecture ) Note on Fetch - Decode - Execute Cycle , created by Georgie Williams on 22/06/2016.
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- Georgie Williams
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