Mind map
Hardware Layer
Map content
Hardware Layer
Logic Gates
- NOT
- AND
- OR
- XOR
- NAND
- NOR
Logic Circuits
- Integrated Circuits
- Adders
Truth Tables
The Universal Gate
Von Neumann's Architecture
- Central Processing Unit (CPU)
- Control Unit (CU)
- Arithmetic Logic Unit (ALU)
- Registers
- Factors that determine the performance
- Frequency
- Bus width
- Storage
- Main Memory
- RAM
- Cache
- ROM
- Secondary Memory
- Online Storage
- Magnetic
- Optical
- Solid State
- Offline Storage
- Online Storage
- Estimate the file size
- Main Memory
- Input/Output System
- System Bus
- Address Bus
- Data Bus
- Control Bus
- Central Processing Unit (CPU)
Fetch-Decode-Execute Cycle
Interrupts
Buffers
Information
- Description
- Mind Map on Hardware Layer, created by Jose Esteve on 14/07/2020.
- Created by
- Jose Esteve
- Views
- 11
- Rating