Computer Science 1.1.1

Computer Science 1.1.1

1. Registers

   • MDR
     • Stores data that has been fetched from or stored in memory.
   • CIR
     • Stores the most recent fetched instruction, waiting to be decoded and executed.
   • PC
     • Contains the location of the instruction being executed at the current time.
   • MAR
     • Stores the address of the data that are to be fetched from or sent to.

2. Buses

   • Data
     • Carries data between the processor and the memory.
   • Address
     • Carries the address of the memory location being read from or written to.
   • Control
     • Sends control signals from the control unit.

3. Fetch-Decode-Execute Cycle

   • Fetch
     • 1.Address of data is placed on address bus and is fetched from the memory.
     • 2.Data from this address travels from memory to CPU via data bus.
   • Decode
     • After data loaded into CIR, it's sent to the CU to decode.
   • Execute
     • Contents then sent to MDR then to ALU, where an addition is performed. Results are stored in the ACC.

4. More CPU Processes

   • ALU
     • Carries out calculations and logical decisions. Results stored in Accumulator.
   • CU
     • Sends signals to co-ordinate how the CPU works. Decoding happens here.
   • ACC
     • Stores results of calculations made by ALU.

5. Architecture

   • Von Neumann
     • Describes a computer with a single control unit that sequentially works through instructions.
     • Bottleneck is caused by instructions and data sent along data bus so only one can be performed at once.
   • Harvard
     • Data and instructions are stored in separate memory units with separate buses for efficiency.
     • Much more efficient than the Von Neumann architecture due to the separate memory units for data and instructions.