Fetch, Decode, Execute

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FETCH

1) The Program Counter points to the address of the next instruction. The contents is copied to the MAR.

2) The Program Counter is incremented.

3) The address in the MAR is placed on the address Bus.

4) On a control signal, this is read by Main Memory and the contents of this Memory location is placed on the data bus.

5) On a control signal, this is read by the CPU and copied to the MDR.

6) IF the MDR contains an instruction this is copied to the CIR ready for DECODE.

DECODE

1) The contents of the CIR is decoded in the CU

2) If the operand contains a memory location, the contents must be fetched. This address is copied to the MAR.

3) The address in the MAR is placed on the address Bus.

4) On a control signal, this is read by Main Memory and the contents of this Memory location is placed on the data bus.

5) On a control signal, this is read by the CPU and copied to the MDR.

EXECUTE

The CPU has everything it needs and runs the instruction.

Any required logic / maths takes place in the ALU.

Any results are placed in the Accumulator