Flashcards
CSE 120 Lecture 08
Cards in this deck (20)
- 1real world implementations of logic have _____ _____ as the signal goes through the logic circuit from input to outputpropagation delay
- 2the delay of the original TTL logic35 nanoseconds
- 3the current presented on the output at high conditionIOH
- 4the current presented on the output at low conditionIOL
- 5the propagation delay between a point on the input and the same point on the output as a transition from low to the high levelTPLH
- 6the propagation delay between a point on the input and the same point on the output as a transition from high to the low levelTPHL
- 7voltage on the input interpreted as the minimum high voltageVIH
- 8voltage on the input interpreted as the maximum low voltageVIL
- 9when the input goes below VIL, the input is considered _____low
- 10when the input goes above VIH, the input is considered _____high
- 11output highVOH
- 12output lowVOL
- 13actual logic may not be well represented by _____ _____steady state
- 14_____ _____ through each gate affect the transient characteristics of the functionpropagation delays
- 15time dependent aspect to the state of a gatetransient aspect
- 16can be added in Karnaugh maps to discourage race conditionslogic redundancy
- 17each gate, depending on the technology, switches when the input moves through _____ _____switching voltages
- 18race condition that changes the eventual state of the functioncritical
- 19race condition that does not effect the eventual state of the function; the output of the switching function will go through several undesired outputs before settling to the desired outputnon-critical
- 20these conditions can also provide (or will allow you to eliminate) terms that resolve race conditions as welldon't cares
Information
- Description
- CSE 120 (Lectures) Flashcards on CSE 120 Lecture 08, created by Branden Roper on 14/02/2018.
- Created by
- Branden Roper
- Views
- 0
- Tags
- Rating
More on CMOS Logic and Logic Families