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Logic Finals

Kp Frondosa Engineering English 51 cards

Cards in this deck (51)

  1. 1circuits whose outputs depends on the sequence of inputs applied and are analyzed with respect to timesequential circuits
  2. 2sequential statespresent, previous, next
  3. 3the reference of sequential operationclock
  4. 4the truth table used to analyze sequential circuits.state table
  5. 5types of sequential circuit triggeringedge and voltage level triggered
  6. 6types of edge triggeredpositive and negative edge
  7. 7the output will remain in its present state until some input change is describedstable state
  8. 8the output will change logic state after a given time , even if the inputs remain unchangedunstable state
  9. 9the process of connecting the output of the device to the input of the same devicefeedback
  10. 10a sequential circuit with one stable and one unstable state; also known as one shotmonostable mulivibrator
  11. 11the time that the one shot is in its unstable statepulse width
  12. 12types of one shotnon-triggerable and retriggerable
  13. 13a sequential circuit with no stable state; also known as oscillatorastable multivibrator
  14. 14types of oscillatorfree-running and gated
  15. 15a linear IC capable of producing various types of oscillation timing waveforms and other digital waveform. it can be wired to perform monostable and astable operation.555 Timer IC
  16. 16types of latchesD latch (delay latch)
    S-R Latch(set-reset latch)
  17. 17applications of latchtemporary storage
    switch debounce
    multiplexing
  18. 18sequential circuits with two stable statesbistable multivibrator
  19. 19a memory device capable of storing 1 bit information. It is a voltage level triggered device.latch
  20. 20types of latch operationsasynchronous
    synchronous
  21. 21a memory device capable of storing 1 bit information. it is an edge-triggered deviceflip-flops
  22. 22flip-flop asynchronous inputsPRE
    CLR
  23. 23forces output to be high(1)PRE
  24. 24forces output to be low(0)CLR
  25. 25types of flip-flopsD Flip-flop
    S-R Flip-flop
    JK Flip flop
  26. 26has no invalid stateJK Flip-flop
  27. 27a flip flop circuit that is pulse triggeredMaster-Slave Flip-flop
  28. 28Applications of Master-Slave Flip-flopdata storage
    counter circuits
    timing circuits and frequency divider
  29. 29is a device that generates binary number in a specified count sequence.digital counter
  30. 30counter classificationscount modulus
    counter stages or bits
  31. 31the total number of states or values generated by the counter as it progresses through its specified count sequencecount modulus
  32. 32counters with modulus of 10 and also known as MOD 10 countersdecade counter
  33. 33counters with n bits and also known as modulus of 2^nbinary counter
  34. 34the number of output bits of the counter is equal to the number of flip flop stages of the countercounter stages or bits
  35. 35it is constructed with one common clock signal as the input to all the flip-flops simultaneously; also known as parallel counterssynchronous counters
  36. 36is classified as a positive or negative edge triggered device depending on the trigger characteristic of the flip-flop circuits that form the countercounter triggering
  37. 37special class of synchronous counter circuit designed from cascaded D flip-flops and produce bit patterns that shifts through all the counter stagesring counters
  38. 38*it cycles a single logic-HIGH output pulse through the stages of the counter *the modulus of the counter is equal to the number of stages (n)basic ring counter
  39. 39*also known as switch tail counter, johnson counter, or moebus counter * it generates a count sequence where only one output changes between consecutive count states *the modulus is 2n for an n bit countertwisted ring counter
  40. 40*very similar to the twisted ring counter but with one less output state in its count sequence *no state where all the outputs are at a logic HIGH level *modulus is 2n-1 for an n bit countermodified twisted ring counter
  41. 41*modulus is (2^n)-1 for a n bit counter *requires a more complex feedback circuitrymaximum length counter
  42. 42a systematic way of designing digital circuits which utilizes diagram and symbols to define the states and function of each operation of a given system.Algorithmic State Machine Design (ASM Design)
  43. 43represents a state in the control sequencestate box
  44. 44represents the effect of control inputsscalar decision box
  45. 45specifies register transfers or signal activations that are to take place after a specified conditionconditional output box
  46. 46represents the effect of a number of control unit inputs in a single structurevector decision box
  47. 47two types of hazards (glitches)logic and function
  48. 48hazards caused by non instantaneous changes in circuit signalslogic hazards
  49. 49hazards inherent in the functional specificationfunction hazards
  50. 50the time it takes the output of the device to respond to a change in the inputs of the device.propagation delay
  51. 51a type of circuit that causes a logic device to switch logic states abruptly at a specific input voltagesschmitt trigger devices

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Engineering Flashcards on Logic Finals, created by Kp Frondosa on 17/03/2018.
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Kp Frondosa
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